Nano Scale Autonomous Error-Tolerant (AET) Cellular Network
نویسندگان
چکیده
In this paper, the nano-CMOS hybrid Autonomous Error-Tolerant (AET) cellular network architecture, which integrates today’s mature CMOS technology with emerging nanotechnology, is proposed. Within the cellular network, each AET cell contains a nanocore, CMOS cell peripherals and their interface circuits. The overall network is homogenous. These imply strict constraints for intercellular connection schemes and routing policies. Depending on the communication requirement between two nodes, different routing methods apply.
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